GPS Device
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stm32f401re_rcc.h
Go to the documentation of this file.
1
26
32
33#ifndef STM32F401RE_RCC_H__
34#define STM32F401RE_RCC_H__
35
36#include "stm32f401re.h"
37#include "common.h"
38
45
58uint32_t rcc_get_sysclk(void);
59
72uint32_t rcc_get_ahb_clk(void);
73
84uint32_t rcc_get_apb1_clk(void);
85
95uint32_t rcc_get_apb2_clk(void);
96
103void rcc_set_pclk_ahb1(RCC_AHB1ENR_te periph_position, EN_STATUS_te en_status);
104
111void rcc_set_pclk_apb1(RCC_APB1ENR_te periph_position, EN_STATUS_te en_status);
112
119void rcc_set_pclk_apb2(RCC_APB2ENR_te periph_position, EN_STATUS_te en_status);
120
129void rcc_reset_periph_ahb1(RCC_AHB1RSTR_te periph_position);
130
139void rcc_reset_periph_apb1(RCC_APB1RSTR_te periph_position);
140
149void rcc_reset_periph_apb2(RCC_APB2RSTR_te periph_position);
150
161void rcc_reset_bkpd(void);
162
164
165#endif
166
Common utility module public API.
EN_STATUS_te
Represents an enabled or disabled state.
Definition common.h:95
void rcc_set_pclk_apb2(RCC_APB2ENR_te periph_position, EN_STATUS_te en_status)
Enables or disables the peripheral clock for an APB2 peripheral.
void rcc_reset_periph_apb2(RCC_APB2RSTR_te periph_position)
Resets an APB2 peripheral via RCC_APB2RSTR.
uint32_t rcc_get_apb2_clk(void)
Returns the current APB2 (high-speed) peripheral bus clock frequency in Hz.
void rcc_set_pclk_ahb1(RCC_AHB1ENR_te periph_position, EN_STATUS_te en_status)
Enables or disables the peripheral clock for an AHB1 peripheral.
void rcc_set_pclk_apb1(RCC_APB1ENR_te periph_position, EN_STATUS_te en_status)
Enables or disables the peripheral clock for an APB1 peripheral.
void rcc_reset_periph_apb1(RCC_APB1RSTR_te periph_position)
Resets an APB1 peripheral via RCC_APB1RSTR.
uint32_t rcc_get_sysclk(void)
Returns the current system clock frequency in Hz.
uint32_t rcc_get_apb1_clk(void)
Returns the current APB1 (low-speed) peripheral bus clock frequency in Hz.
uint32_t rcc_get_ahb_clk(void)
Returns the current AHB bus clock frequency in Hz.
void rcc_reset_bkpd(void)
Resets the backup domain (RTC, backup registers, backup SRAM).
void rcc_reset_periph_ahb1(RCC_AHB1RSTR_te periph_position)
Resets an AHB1 peripheral via RCC_AHB1RSTR.
RCC_AHB1RSTR_te
RCC_AHB1RSTR register bit positions.
RCC_AHB1ENR_te
RCC_AHB1ENR register bit positions.
RCC_APB2ENR_te
RCC_APB2ENR register bit positions.
RCC_APB2RSTR_te
RCC_APB2RSTR register bit positions.
RCC_APB1ENR_te
RCC_APB1ENR register bit positions.
RCC_APB1RSTR_te
RCC_APB1RSTR register bit positions.
STM32F401RE MCU-specific peripheral register definitions and bit position enumerations.