Cortex-M4 Core Peripherals

Register definitions for NVIC and SysTick core peripherals. More...

Collaboration diagram for Cortex-M4 Core Peripherals:

Topics
	Cortex-M4 Peripheral Base Addresses
	Fixed memory-mapped base addresses for Cortex-M4 core peripherals.
	NVIC Register Definitions
	Memory-mapped register structures for the NVIC.
	SysTick Register Definitions
	Memory-mapped register structure and bit positions for the SysTick timer.
	Cortex-M4 NVIC API
	Public API for enabling and disabling NVIC interrupt lines.
	SysTick Driver
	Millisecond tick counter driven by the Cortex-M4 SysTick timer.

Detailed Description

Register definitions for NVIC and SysTick core peripherals.