Memory-mapped register structure and bit positions for the SysTick timer. More...

Collaboration diagram for SysTick Register Definitions:

Classes
struct	SYST_REGDEF_ts
	SysTick control and status register block. More...

Macros
#define	SYSTICK ((SYST_REGDEF_ts*)ADDR_SYSTICK)

Enumerations
enum	SYST_CSR_te { SYST_CSR_ENABLE = 0 , SYST_CSR_TICKINT = 1 , SYST_CSR_CLKSOURCE = 2 , SYST_CSR_COUNTFLAG = 16 }
	Bit positions within the SysTick Control and Status Register (SYST_CSR). More...
enum	SYST_RVR_te { SYST_RVR_RELOAD = 0 }
	Bit positions within the SysTick Reload Value Register (SYST_RVR). More...
enum	SYST_CVR_te { SYST_CVR_CURRENT = 0 }
	Bit positions within the SysTick Current Value Register (SYST_CVR). More...
enum	SYST_CALIB_te { SYST_CALIB_TENMS = 0 , SYST_CALIB_SKEW = 30 , SYST_CALIB_NOREF = 31 }
	Bit positions within the SysTick Calibration Value Register (SYST_CALIB). More...

Detailed Description

Memory-mapped register structure and bit positions for the SysTick timer.

Macro Definition Documentation

Definition at line 161 of file arm_cortex_m4.h.

Bit positions within the SysTick Control and Status Register (SYST_CSR).

Enumerator
SYST_CSR_ENABLE	Bit 0: Enable the SysTick counter (1 = enabled, 0 = disabled).
SYST_CSR_TICKINT	Bit 1: Enable SysTick exception request (1 = assert on count to 0).
SYST_CSR_CLKSOURCE	Bit 2: Clock source select (0 = external reference, 1 = processor clock).
SYST_CSR_COUNTFLAG	Bit 16: Set to 1 when counter reaches 0 since last read; cleared on read.

Definition at line 166 of file arm_cortex_m4.h.

             {
    SYST_CSR_ENABLE    = 0,  
    SYST_CSR_TICKINT   = 1,  
    SYST_CSR_CLKSOURCE = 2,  
    SYST_CSR_COUNTFLAG = 16  
} SYST_CSR_te;

Bit positions within the SysTick Reload Value Register (SYST_RVR).

Enumerator
SYST_RVR_RELOAD	Bits 23:0: Value to reload into CVR on counter wrap-around.

Definition at line 176 of file arm_cortex_m4.h.

             {
    SYST_RVR_RELOAD = 0 
} SYST_RVR_te;

Bit positions within the SysTick Current Value Register (SYST_CVR).

Enumerator
SYST_CVR_CURRENT	Bits 23:0: Current counter value. Writing any value clears both CVR and COUNTFLAG.

Definition at line 183 of file arm_cortex_m4.h.

             {
    SYST_CVR_CURRENT = 0 
} SYST_CVR_te;

Bit positions within the SysTick Calibration Value Register (SYST_CALIB).

Enumerator
SYST_CALIB_TENMS	Bits 23:0: Optionally-implemented reload value for a 10 ms tick period.
SYST_CALIB_SKEW	Bit 30: Set if the 10 ms calibration value is inexact.
SYST_CALIB_NOREF	Bit 31: Set if no external reference clock is provided.

Definition at line 190 of file arm_cortex_m4.h.

             {
    SYST_CALIB_TENMS = 0,  
    SYST_CALIB_SKEW  = 30, 
    SYST_CALIB_NOREF = 31  
} SYST_CALIB_te;