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NVIC Software Trigger Interrupt Register (NVIC_STIR). More...
#include <arm_cortex_m4.h>
Public Attributes | |
| uint32_t volatile | NVIC_STIR_ |
NVIC Software Trigger Interrupt Register (NVIC_STIR).
Writing an interrupt number to this register generates that interrupt as if it were triggered by hardware. Requires the USERSETMPEND bit in CCR to be set for unprivileged access.
Definition at line 134 of file arm_cortex_m4.h.
| uint32_t volatile NVIC_STIR_REGDEF_ts::NVIC_STIR_ |
STIR: write an IRQ number to trigger that interrupt in software.
Definition at line 135 of file arm_cortex_m4.h.