NVIC Interrupt Set-Pending Registers (NVIC_ISPR). More...

Public Attributes
uint32_t volatile	NVIC_ISPR_ [8]

Detailed Description

NVIC Interrupt Set-Pending Registers (NVIC_ISPR).

Writing 1 to a bit sets the corresponding interrupt to pending state.

Definition at line 85 of file arm_cortex_m4.h.

Member Data Documentation

uint32_t volatile NVIC_ISPR_REGDEF_ts::NVIC_ISPR_[8]

ISPR[0]–ISPR[7]: each bit sets one interrupt pending.

Definition at line 86 of file arm_cortex_m4.h.

The documentation for this struct was generated from the following file: