NVIC Interrupt Clear-Enable Registers (NVIC_ICER). More...

Public Attributes
uint32_t volatile	NVIC_ICER_ [8]

Detailed Description

NVIC Interrupt Clear-Enable Registers (NVIC_ICER).

Writing 1 to a bit disables the corresponding interrupt. Writing 0 has no effect.

Definition at line 74 of file arm_cortex_m4.h.

Member Data Documentation

uint32_t volatile NVIC_ICER_REGDEF_ts::NVIC_ICER_[8]

ICER[0]–ICER[7]: each bit disables one interrupt line.

Definition at line 75 of file arm_cortex_m4.h.

The documentation for this struct was generated from the following file: