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GPS Device
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USART peripheral register map. More...
#include <stm32f401re.h>
Public Attributes | |
| uint32_t volatile | USART_SR |
| uint32_t volatile | USART_DR |
| uint32_t volatile | USART_BRR |
| uint32_t volatile | USART_CR1 |
| uint32_t volatile | USART_CR2 |
| uint32_t volatile | USART_CR3 |
| uint32_t volatile | USART_GTPR |
USART peripheral register map.
Instantiated via the USART1, USART2, USART6 accessor macros.
Definition at line 260 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_SR |
Status register: TXE, TC, RXNE, IDLE, error flags.
Definition at line 261 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_DR |
Data register: write to transmit, read to receive (clears RXNE).
Definition at line 262 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_BRR |
Baud rate register: mantissa and fraction fields.
Definition at line 263 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_CR1 |
Control register 1: UE, M (word length), PCE, PS, TE, RE, interrupt enables.
Definition at line 264 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_CR2 |
Control register 2: STOP bits, clock (sync mode), LIN.
Definition at line 265 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_CR3 |
Control register 3: hardware flow control, DMA, IrDA, smartcard, ONEBIT.
Definition at line 266 of file stm32f401re.h.
| uint32_t volatile USART_REGDEF_ts::USART_GTPR |
Guard time and prescaler register (smartcard / IrDA).
Definition at line 267 of file stm32f401re.h.