RCC (Reset and Clock Control) peripheral register map. More...

#include <stm32f401re.h>

Public Attributes
uint32_t volatile	RCC_CR
uint32_t volatile	RCC_PLLCFGR
uint32_t volatile	RCC_CFGR
uint32_t volatile	RCC_CIR
uint32_t volatile	RCC_AHB1RSTR
uint32_t volatile	RCC_AHB2RSTR
uint32_t	RESERVED0 [2]
uint32_t volatile	RCC_APB1RSTR
uint32_t volatile	RCC_APB2RSTR
uint32_t	RESERVED1 [2]
uint32_t volatile	RCC_AHB1ENR
uint32_t volatile	RCC_AHB2ENR
uint32_t	RESERVED2 [2]
uint32_t volatile	RCC_APB1ENR
uint32_t volatile	RCC_APB2ENR
uint32_t	RESERVED3 [2]
uint32_t volatile	RCC_AHB1LPENR
uint32_t volatile	RCC_AHB2LPENR
uint32_t	RESERVED4 [2]
uint32_t volatile	RCC_APB1LPENR
uint32_t volatile	RCC_APB2LPENR
uint32_t	RESERVED5 [2]
uint32_t volatile	RCC_BDCR
uint32_t volatile	RCC_CSR
uint32_t	RESERVED6 [2]
uint32_t volatile	RCC_SSCFGR
uint32_t volatile	RCC_PLLI2SCFGR
uint32_t	RESERVED7
uint32_t volatile	RCC_DCKCFGR

Detailed Description

RCC (Reset and Clock Control) peripheral register map.

Provides clock source selection, PLL configuration, bus prescalers, peripheral clock enables, peripheral resets, low-power clock enables, and the backup domain control register. Instantiated via the RCC accessor macro.

Definition at line 116 of file stm32f401re.h.

Member Data Documentation

◆ RCC_CR

uint32_t volatile RCC_REGDEF_ts::RCC_CR

Clock control register: HSI/HSE/PLL enable and ready flags.

Definition at line 117 of file stm32f401re.h.

◆ RCC_PLLCFGR

uint32_t volatile RCC_REGDEF_ts::RCC_PLLCFGR

PLL configuration register: M, N, P, Q dividers and source.

Definition at line 118 of file stm32f401re.h.

◆ RCC_CFGR

uint32_t volatile RCC_REGDEF_ts::RCC_CFGR

Clock configuration register: system clock switch, bus prescalers.

Definition at line 119 of file stm32f401re.h.

◆ RCC_CIR

uint32_t volatile RCC_REGDEF_ts::RCC_CIR

Clock interrupt register: ready flags and interrupt enables.

Definition at line 120 of file stm32f401re.h.

◆ RCC_AHB1RSTR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB1RSTR

AHB1 peripheral reset register.

Definition at line 121 of file stm32f401re.h.

◆ RCC_AHB2RSTR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB2RSTR

AHB2 peripheral reset register.

Definition at line 122 of file stm32f401re.h.

◆ RESERVED0

uint32_t RCC_REGDEF_ts::RESERVED0[2]

Definition at line 123 of file stm32f401re.h.

◆ RCC_APB1RSTR

uint32_t volatile RCC_REGDEF_ts::RCC_APB1RSTR

APB1 peripheral reset register.

Definition at line 124 of file stm32f401re.h.

◆ RCC_APB2RSTR

uint32_t volatile RCC_REGDEF_ts::RCC_APB2RSTR

APB2 peripheral reset register.

Definition at line 125 of file stm32f401re.h.

◆ RESERVED1

uint32_t RCC_REGDEF_ts::RESERVED1[2]

Definition at line 126 of file stm32f401re.h.

◆ RCC_AHB1ENR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB1ENR

AHB1 peripheral clock enable register.

Definition at line 127 of file stm32f401re.h.

◆ RCC_AHB2ENR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB2ENR

AHB2 peripheral clock enable register.

Definition at line 128 of file stm32f401re.h.

◆ RESERVED2

uint32_t RCC_REGDEF_ts::RESERVED2[2]

Definition at line 129 of file stm32f401re.h.

◆ RCC_APB1ENR

uint32_t volatile RCC_REGDEF_ts::RCC_APB1ENR

APB1 peripheral clock enable register.

Definition at line 130 of file stm32f401re.h.

◆ RCC_APB2ENR

uint32_t volatile RCC_REGDEF_ts::RCC_APB2ENR

APB2 peripheral clock enable register.

Definition at line 131 of file stm32f401re.h.

◆ RESERVED3

uint32_t RCC_REGDEF_ts::RESERVED3[2]

Definition at line 132 of file stm32f401re.h.

◆ RCC_AHB1LPENR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB1LPENR

AHB1 peripheral low-power clock enable register.

Definition at line 133 of file stm32f401re.h.

◆ RCC_AHB2LPENR

uint32_t volatile RCC_REGDEF_ts::RCC_AHB2LPENR

AHB2 peripheral low-power clock enable register.

Definition at line 134 of file stm32f401re.h.

◆ RESERVED4

uint32_t RCC_REGDEF_ts::RESERVED4[2]

Definition at line 135 of file stm32f401re.h.

◆ RCC_APB1LPENR

uint32_t volatile RCC_REGDEF_ts::RCC_APB1LPENR

APB1 peripheral low-power clock enable register.

Definition at line 136 of file stm32f401re.h.

◆ RCC_APB2LPENR

uint32_t volatile RCC_REGDEF_ts::RCC_APB2LPENR

APB2 peripheral low-power clock enable register.

Definition at line 137 of file stm32f401re.h.

◆ RESERVED5

uint32_t RCC_REGDEF_ts::RESERVED5[2]

Definition at line 138 of file stm32f401re.h.

◆ RCC_BDCR

uint32_t volatile RCC_REGDEF_ts::RCC_BDCR

Backup domain control register: LSE, RTC clock source, backup reset.

Definition at line 139 of file stm32f401re.h.

◆ RCC_CSR

uint32_t volatile RCC_REGDEF_ts::RCC_CSR

Control/status register: LSI enable/ready, reset flags.

Definition at line 140 of file stm32f401re.h.

◆ RESERVED6

uint32_t RCC_REGDEF_ts::RESERVED6[2]

Definition at line 141 of file stm32f401re.h.

◆ RCC_SSCFGR

uint32_t volatile RCC_REGDEF_ts::RCC_SSCFGR

Spread spectrum clock generation register.

Definition at line 142 of file stm32f401re.h.

◆ RCC_PLLI2SCFGR

uint32_t volatile RCC_REGDEF_ts::RCC_PLLI2SCFGR

PLLI2S configuration register.

Definition at line 143 of file stm32f401re.h.

◆ RESERVED7

uint32_t RCC_REGDEF_ts::RESERVED7

Definition at line 144 of file stm32f401re.h.

◆ RCC_DCKCFGR

uint32_t volatile RCC_REGDEF_ts::RCC_DCKCFGR

Dedicated clocks configuration register.

Definition at line 145 of file stm32f401re.h.

The documentation for this struct was generated from the following file:

drivers/inc/stm32f401re.h

Public Attributes