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GPS Device
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GPIO peripheral register map. More...
#include <stm32f401re.h>
Public Attributes | |
| uint32_t volatile | GPIO_MODER |
| uint32_t volatile | GPIO_OTYPER |
| uint32_t volatile | GPIO_OSPEEDR |
| uint32_t volatile | GPIO_PUPDR |
| uint32_t volatile | GPIO_IDR |
| uint32_t volatile | GPIO_ODR |
| uint32_t volatile | GPIO_BSRR |
| uint32_t volatile | GPIO_LCKR |
| uint32_t volatile | GPIO_AFR [2] |
GPIO peripheral register map.
Each GPIO port occupies 0x400 bytes and contains the following registers. Instantiated via the GPIOA … GPIOH accessor macros.
Definition at line 95 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_MODER |
Mode register: 2 bits per pin — input, output, AF, or analog.
Definition at line 96 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_OTYPER |
Output type register: 0 = push-pull, 1 = open-drain.
Definition at line 97 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_OSPEEDR |
Output speed register: 2 bits per pin — low/medium/high/very high.
Definition at line 98 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_PUPDR |
Pull-up/pull-down register: 2 bits per pin — none/PU/PD.
Definition at line 99 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_IDR |
Input data register: read-only, reflects pin logic levels.
Definition at line 100 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_ODR |
Output data register: write the desired output level per pin.
Definition at line 101 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_BSRR |
Bit set/reset register: upper 16 bits reset, lower 16 bits set.
Definition at line 102 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_LCKR |
Lock register: freezes pin configuration until next reset.
Definition at line 103 of file stm32f401re.h.
| uint32_t volatile GPIO_REGDEF_ts::GPIO_AFR[2] |
Alternate function registers: AFR[0] for pins 0–7, AFR[1] for pins 8–15.
Definition at line 104 of file stm32f401re.h.