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ssd1309.h File Reference

SSD1309 OLED display driver public API. More...

#include "stm32f401re.h"
#include "stm32f401re_gpio.h"
#include "err.h"
Include dependency graph for ssd1309.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes

struct  SSD1309_CFG_ts
 Full configuration structure for initializing an SSD1309 display handle. More...

Macros

#define SSD1309_WIDTH   128
#define SSD1309_HEIGHT   64
#define SSD1309_CHAR_WIDTH   8
#define SSD1309_CHAR_HEIGHT   8
#define SSD1309_MAX_CHARS_IN_LINE   16

Typedefs

typedef struct ssd1309_handle_s SSD1309_HANDLE_ts
 Opaque handle representing an SSD1309 display instance.

Enumerations

enum  SSD1309_LOW_COL_START_ADDR_PAM_te {
  SSD1309_LOW_COL_START_ADDR_PAM_0 , SSD1309_LOW_COL_START_ADDR_PAM_1 , SSD1309_LOW_COL_START_ADDR_PAM_2 , SSD1309_LOW_COL_START_ADDR_PAM_3 ,
  SSD1309_LOW_COL_START_ADDR_PAM_4 , SSD1309_LOW_COL_START_ADDR_PAM_5 , SSD1309_LOW_COL_START_ADDR_PAM_6 , SSD1309_LOW_COL_START_ADDR_PAM_7 ,
  SSD1309_LOW_COL_START_ADDR_PAM_8 , SSD1309_LOW_COL_START_ADDR_PAM_9 , SSD1309_LOW_COL_START_ADDR_PAM_10 , SSD1309_LOW_COL_START_ADDR_PAM_11 ,
  SSD1309_LOW_COL_START_ADDR_PAM_12 , SSD1309_LOW_COL_START_ADDR_PAM_13 , SSD1309_LOW_COL_START_ADDR_PAM_14 , SSD1309_LOW_COL_START_ADDR_PAM_15
}
 Lower column start address (lower 4 bit part of 8 bit address) for RAM scanning of the SSD1309. Only relevant for PAM. More...
enum  SSD1309_HIGH_COL_START_ADDR_PAM_te {
  SSD1309_HIGH_COL_START_ADDR_PAM_0 , SSD1309_HIGH_COL_START_ADDR_PAM_1 , SSD1309_HIGH_COL_START_ADDR_PAM_2 , SSD1309_HIGH_COL_START_ADDR_PAM_3 ,
  SSD1309_HIGH_COL_START_ADDR_PAM_4 , SSD1309_HIGH_COL_START_ADDR_PAM_5 , SSD1309_HIGH_COL_START_ADDR_PAM_6 , SSD1309_HIGH_COL_START_ADDR_PAM_7
}
 Higher column start address (upper 4 bit part of 8 bit address) for RAM scanning of the SSD1309.
Only relevant for PAM. SSD1309 is 128 pixels wide, thus only 3 bits are allowed in the higher nibble. More...
enum  SSD1309_MEM_ADDR_MODE_te { SSD1309_MEM_ADDR_MODE_HAM , SSD1309_MEM_ADDR_MODE_VAM , SSD1309_MEM_ADDR_MODE_PAM }
 Memory addressing mode: More...
enum  SSD1309_COL_ADDR_START_HAM_VAM_te {
  SSD1309_COL_ADDR_START_HAM_VAM_0 , SSD1309_COL_ADDR_START_HAM_VAM_1 , SSD1309_COL_ADDR_START_HAM_VAM_2 , SSD1309_COL_ADDR_START_HAM_VAM_3 ,
  SSD1309_COL_ADDR_START_HAM_VAM_4 , SSD1309_COL_ADDR_START_HAM_VAM_5 , SSD1309_COL_ADDR_START_HAM_VAM_6 , SSD1309_COL_ADDR_START_HAM_VAM_7 ,
  SSD1309_COL_ADDR_START_HAM_VAM_8 , SSD1309_COL_ADDR_START_HAM_VAM_9 , SSD1309_COL_ADDR_START_HAM_VAM_10 , SSD1309_COL_ADDR_START_HAM_VAM_11 ,
  SSD1309_COL_ADDR_START_HAM_VAM_12 , SSD1309_COL_ADDR_START_HAM_VAM_13 , SSD1309_COL_ADDR_START_HAM_VAM_14 , SSD1309_COL_ADDR_START_HAM_VAM_15 ,
  SSD1309_COL_ADDR_START_HAM_VAM_16 , SSD1309_COL_ADDR_START_HAM_VAM_17 , SSD1309_COL_ADDR_START_HAM_VAM_18 , SSD1309_COL_ADDR_START_HAM_VAM_19 ,
  SSD1309_COL_ADDR_START_HAM_VAM_20 , SSD1309_COL_ADDR_START_HAM_VAM_21 , SSD1309_COL_ADDR_START_HAM_VAM_22 , SSD1309_COL_ADDR_START_HAM_VAM_23 ,
  SSD1309_COL_ADDR_START_HAM_VAM_24 , SSD1309_COL_ADDR_START_HAM_VAM_25 , SSD1309_COL_ADDR_START_HAM_VAM_26 , SSD1309_COL_ADDR_START_HAM_VAM_27 ,
  SSD1309_COL_ADDR_START_HAM_VAM_28 , SSD1309_COL_ADDR_START_HAM_VAM_29 , SSD1309_COL_ADDR_START_HAM_VAM_30 , SSD1309_COL_ADDR_START_HAM_VAM_31 ,
  SSD1309_COL_ADDR_START_HAM_VAM_32 , SSD1309_COL_ADDR_START_HAM_VAM_33 , SSD1309_COL_ADDR_START_HAM_VAM_34 , SSD1309_COL_ADDR_START_HAM_VAM_35 ,
  SSD1309_COL_ADDR_START_HAM_VAM_36 , SSD1309_COL_ADDR_START_HAM_VAM_37 , SSD1309_COL_ADDR_START_HAM_VAM_38 , SSD1309_COL_ADDR_START_HAM_VAM_39 ,
  SSD1309_COL_ADDR_START_HAM_VAM_40 , SSD1309_COL_ADDR_START_HAM_VAM_41 , SSD1309_COL_ADDR_START_HAM_VAM_42 , SSD1309_COL_ADDR_START_HAM_VAM_43 ,
  SSD1309_COL_ADDR_START_HAM_VAM_44 , SSD1309_COL_ADDR_START_HAM_VAM_45 , SSD1309_COL_ADDR_START_HAM_VAM_46 , SSD1309_COL_ADDR_START_HAM_VAM_47 ,
  SSD1309_COL_ADDR_START_HAM_VAM_48 , SSD1309_COL_ADDR_START_HAM_VAM_49 , SSD1309_COL_ADDR_START_HAM_VAM_50 , SSD1309_COL_ADDR_START_HAM_VAM_51 ,
  SSD1309_COL_ADDR_START_HAM_VAM_52 , SSD1309_COL_ADDR_START_HAM_VAM_53 , SSD1309_COL_ADDR_START_HAM_VAM_54 , SSD1309_COL_ADDR_START_HAM_VAM_55 ,
  SSD1309_COL_ADDR_START_HAM_VAM_56 , SSD1309_COL_ADDR_START_HAM_VAM_57 , SSD1309_COL_ADDR_START_HAM_VAM_58 , SSD1309_COL_ADDR_START_HAM_VAM_59 ,
  SSD1309_COL_ADDR_START_HAM_VAM_60 , SSD1309_COL_ADDR_START_HAM_VAM_61 , SSD1309_COL_ADDR_START_HAM_VAM_62 , SSD1309_COL_ADDR_START_HAM_VAM_63 ,
  SSD1309_COL_ADDR_START_HAM_VAM_64 , SSD1309_COL_ADDR_START_HAM_VAM_65 , SSD1309_COL_ADDR_START_HAM_VAM_66 , SSD1309_COL_ADDR_START_HAM_VAM_67 ,
  SSD1309_COL_ADDR_START_HAM_VAM_68 , SSD1309_COL_ADDR_START_HAM_VAM_69 , SSD1309_COL_ADDR_START_HAM_VAM_70 , SSD1309_COL_ADDR_START_HAM_VAM_71 ,
  SSD1309_COL_ADDR_START_HAM_VAM_72 , SSD1309_COL_ADDR_START_HAM_VAM_73 , SSD1309_COL_ADDR_START_HAM_VAM_74 , SSD1309_COL_ADDR_START_HAM_VAM_75 ,
  SSD1309_COL_ADDR_START_HAM_VAM_76 , SSD1309_COL_ADDR_START_HAM_VAM_77 , SSD1309_COL_ADDR_START_HAM_VAM_78 , SSD1309_COL_ADDR_START_HAM_VAM_79 ,
  SSD1309_COL_ADDR_START_HAM_VAM_80 , SSD1309_COL_ADDR_START_HAM_VAM_81 , SSD1309_COL_ADDR_START_HAM_VAM_82 , SSD1309_COL_ADDR_START_HAM_VAM_83 ,
  SSD1309_COL_ADDR_START_HAM_VAM_84 , SSD1309_COL_ADDR_START_HAM_VAM_85 , SSD1309_COL_ADDR_START_HAM_VAM_86 , SSD1309_COL_ADDR_START_HAM_VAM_87 ,
  SSD1309_COL_ADDR_START_HAM_VAM_88 , SSD1309_COL_ADDR_START_HAM_VAM_89 , SSD1309_COL_ADDR_START_HAM_VAM_90 , SSD1309_COL_ADDR_START_HAM_VAM_91 ,
  SSD1309_COL_ADDR_START_HAM_VAM_92 , SSD1309_COL_ADDR_START_HAM_VAM_93 , SSD1309_COL_ADDR_START_HAM_VAM_94 , SSD1309_COL_ADDR_START_HAM_VAM_95 ,
  SSD1309_COL_ADDR_START_HAM_VAM_96 , SSD1309_COL_ADDR_START_HAM_VAM_97 , SSD1309_COL_ADDR_START_HAM_VAM_98 , SSD1309_COL_ADDR_START_HAM_VAM_99 ,
  SSD1309_COL_ADDR_START_HAM_VAM_100 , SSD1309_COL_ADDR_START_HAM_VAM_101 , SSD1309_COL_ADDR_START_HAM_VAM_102 , SSD1309_COL_ADDR_START_HAM_VAM_103 ,
  SSD1309_COL_ADDR_START_HAM_VAM_104 , SSD1309_COL_ADDR_START_HAM_VAM_105 , SSD1309_COL_ADDR_START_HAM_VAM_106 , SSD1309_COL_ADDR_START_HAM_VAM_107 ,
  SSD1309_COL_ADDR_START_HAM_VAM_108 , SSD1309_COL_ADDR_START_HAM_VAM_109 , SSD1309_COL_ADDR_START_HAM_VAM_110 , SSD1309_COL_ADDR_START_HAM_VAM_111 ,
  SSD1309_COL_ADDR_START_HAM_VAM_112 , SSD1309_COL_ADDR_START_HAM_VAM_113 , SSD1309_COL_ADDR_START_HAM_VAM_114 , SSD1309_COL_ADDR_START_HAM_VAM_115 ,
  SSD1309_COL_ADDR_START_HAM_VAM_116 , SSD1309_COL_ADDR_START_HAM_VAM_117 , SSD1309_COL_ADDR_START_HAM_VAM_118 , SSD1309_COL_ADDR_START_HAM_VAM_119 ,
  SSD1309_COL_ADDR_START_HAM_VAM_120 , SSD1309_COL_ADDR_START_HAM_VAM_121 , SSD1309_COL_ADDR_START_HAM_VAM_122 , SSD1309_COL_ADDR_START_HAM_VAM_123 ,
  SSD1309_COL_ADDR_START_HAM_VAM_124 , SSD1309_COL_ADDR_START_HAM_VAM_125 , SSD1309_COL_ADDR_START_HAM_VAM_126 , SSD1309_COL_ADDR_START_HAM_VAM_127
}
 Column start address for RAM scanning of the SSD1309. Only relevant for HAM and VAM. More...
enum  SSD1309_COL_ADDR_END_HAM_VAM_te {
  SSD1309_COL_ADDR_END_HAM_VAM_0 , SSD1309_COL_ADDR_END_HAM_VAM_1 , SSD1309_COL_ADDR_END_HAM_VAM_2 , SSD1309_COL_ADDR_END_HAM_VAM_3 ,
  SSD1309_COL_ADDR_END_HAM_VAM_4 , SSD1309_COL_ADDR_END_HAM_VAM_5 , SSD1309_COL_ADDR_END_HAM_VAM_6 , SSD1309_COL_ADDR_END_HAM_VAM_7 ,
  SSD1309_COL_ADDR_END_HAM_VAM_8 , SSD1309_COL_ADDR_END_HAM_VAM_9 , SSD1309_COL_ADDR_END_HAM_VAM_10 , SSD1309_COL_ADDR_END_HAM_VAM_11 ,
  SSD1309_COL_ADDR_END_HAM_VAM_12 , SSD1309_COL_ADDR_END_HAM_VAM_13 , SSD1309_COL_ADDR_END_HAM_VAM_14 , SSD1309_COL_ADDR_END_HAM_VAM_15 ,
  SSD1309_COL_ADDR_END_HAM_VAM_16 , SSD1309_COL_ADDR_END_HAM_VAM_17 , SSD1309_COL_ADDR_END_HAM_VAM_18 , SSD1309_COL_ADDR_END_HAM_VAM_19 ,
  SSD1309_COL_ADDR_END_HAM_VAM_20 , SSD1309_COL_ADDR_END_HAM_VAM_21 , SSD1309_COL_ADDR_END_HAM_VAM_22 , SSD1309_COL_ADDR_END_HAM_VAM_23 ,
  SSD1309_COL_ADDR_END_HAM_VAM_24 , SSD1309_COL_ADDR_END_HAM_VAM_25 , SSD1309_COL_ADDR_END_HAM_VAM_26 , SSD1309_COL_ADDR_END_HAM_VAM_27 ,
  SSD1309_COL_ADDR_END_HAM_VAM_28 , SSD1309_COL_ADDR_END_HAM_VAM_29 , SSD1309_COL_ADDR_END_HAM_VAM_30 , SSD1309_COL_ADDR_END_HAM_VAM_31 ,
  SSD1309_COL_ADDR_END_HAM_VAM_32 , SSD1309_COL_ADDR_END_HAM_VAM_33 , SSD1309_COL_ADDR_END_HAM_VAM_34 , SSD1309_COL_ADDR_END_HAM_VAM_35 ,
  SSD1309_COL_ADDR_END_HAM_VAM_36 , SSD1309_COL_ADDR_END_HAM_VAM_37 , SSD1309_COL_ADDR_END_HAM_VAM_38 , SSD1309_COL_ADDR_END_HAM_VAM_39 ,
  SSD1309_COL_ADDR_END_HAM_VAM_40 , SSD1309_COL_ADDR_END_HAM_VAM_41 , SSD1309_COL_ADDR_END_HAM_VAM_42 , SSD1309_COL_ADDR_END_HAM_VAM_43 ,
  SSD1309_COL_ADDR_END_HAM_VAM_44 , SSD1309_COL_ADDR_END_HAM_VAM_45 , SSD1309_COL_ADDR_END_HAM_VAM_46 , SSD1309_COL_ADDR_END_HAM_VAM_47 ,
  SSD1309_COL_ADDR_END_HAM_VAM_48 , SSD1309_COL_ADDR_END_HAM_VAM_49 , SSD1309_COL_ADDR_END_HAM_VAM_50 , SSD1309_COL_ADDR_END_HAM_VAM_51 ,
  SSD1309_COL_ADDR_END_HAM_VAM_52 , SSD1309_COL_ADDR_END_HAM_VAM_53 , SSD1309_COL_ADDR_END_HAM_VAM_54 , SSD1309_COL_ADDR_END_HAM_VAM_55 ,
  SSD1309_COL_ADDR_END_HAM_VAM_56 , SSD1309_COL_ADDR_END_HAM_VAM_57 , SSD1309_COL_ADDR_END_HAM_VAM_58 , SSD1309_COL_ADDR_END_HAM_VAM_59 ,
  SSD1309_COL_ADDR_END_HAM_VAM_60 , SSD1309_COL_ADDR_END_HAM_VAM_61 , SSD1309_COL_ADDR_END_HAM_VAM_62 , SSD1309_COL_ADDR_END_HAM_VAM_63 ,
  SSD1309_COL_ADDR_END_HAM_VAM_64 , SSD1309_COL_ADDR_END_HAM_VAM_65 , SSD1309_COL_ADDR_END_HAM_VAM_66 , SSD1309_COL_ADDR_END_HAM_VAM_67 ,
  SSD1309_COL_ADDR_END_HAM_VAM_68 , SSD1309_COL_ADDR_END_HAM_VAM_69 , SSD1309_COL_ADDR_END_HAM_VAM_70 , SSD1309_COL_ADDR_END_HAM_VAM_71 ,
  SSD1309_COL_ADDR_END_HAM_VAM_72 , SSD1309_COL_ADDR_END_HAM_VAM_73 , SSD1309_COL_ADDR_END_HAM_VAM_74 , SSD1309_COL_ADDR_END_HAM_VAM_75 ,
  SSD1309_COL_ADDR_END_HAM_VAM_76 , SSD1309_COL_ADDR_END_HAM_VAM_77 , SSD1309_COL_ADDR_END_HAM_VAM_78 , SSD1309_COL_ADDR_END_HAM_VAM_79 ,
  SSD1309_COL_ADDR_END_HAM_VAM_80 , SSD1309_COL_ADDR_END_HAM_VAM_81 , SSD1309_COL_ADDR_END_HAM_VAM_82 , SSD1309_COL_ADDR_END_HAM_VAM_83 ,
  SSD1309_COL_ADDR_END_HAM_VAM_84 , SSD1309_COL_ADDR_END_HAM_VAM_85 , SSD1309_COL_ADDR_END_HAM_VAM_86 , SSD1309_COL_ADDR_END_HAM_VAM_87 ,
  SSD1309_COL_ADDR_END_HAM_VAM_88 , SSD1309_COL_ADDR_END_HAM_VAM_89 , SSD1309_COL_ADDR_END_HAM_VAM_90 , SSD1309_COL_ADDR_END_HAM_VAM_91 ,
  SSD1309_COL_ADDR_END_HAM_VAM_92 , SSD1309_COL_ADDR_END_HAM_VAM_93 , SSD1309_COL_ADDR_END_HAM_VAM_94 , SSD1309_COL_ADDR_END_HAM_VAM_95 ,
  SSD1309_COL_ADDR_END_HAM_VAM_96 , SSD1309_COL_ADDR_END_HAM_VAM_97 , SSD1309_COL_ADDR_END_HAM_VAM_98 , SSD1309_COL_ADDR_END_HAM_VAM_99 ,
  SSD1309_COL_ADDR_END_HAM_VAM_100 , SSD1309_COL_ADDR_END_HAM_VAM_101 , SSD1309_COL_ADDR_END_HAM_VAM_102 , SSD1309_COL_ADDR_END_HAM_VAM_103 ,
  SSD1309_COL_ADDR_END_HAM_VAM_104 , SSD1309_COL_ADDR_END_HAM_VAM_105 , SSD1309_COL_ADDR_END_HAM_VAM_106 , SSD1309_COL_ADDR_END_HAM_VAM_107 ,
  SSD1309_COL_ADDR_END_HAM_VAM_108 , SSD1309_COL_ADDR_END_HAM_VAM_109 , SSD1309_COL_ADDR_END_HAM_VAM_110 , SSD1309_COL_ADDR_END_HAM_VAM_111 ,
  SSD1309_COL_ADDR_END_HAM_VAM_112 , SSD1309_COL_ADDR_END_HAM_VAM_113 , SSD1309_COL_ADDR_END_HAM_VAM_114 , SSD1309_COL_ADDR_END_HAM_VAM_115 ,
  SSD1309_COL_ADDR_END_HAM_VAM_116 , SSD1309_COL_ADDR_END_HAM_VAM_117 , SSD1309_COL_ADDR_END_HAM_VAM_118 , SSD1309_COL_ADDR_END_HAM_VAM_119 ,
  SSD1309_COL_ADDR_END_HAM_VAM_120 , SSD1309_COL_ADDR_END_HAM_VAM_121 , SSD1309_COL_ADDR_END_HAM_VAM_122 , SSD1309_COL_ADDR_END_HAM_VAM_123 ,
  SSD1309_COL_ADDR_END_HAM_VAM_124 , SSD1309_COL_ADDR_END_HAM_VAM_125 , SSD1309_COL_ADDR_END_HAM_VAM_126 , SSD1309_COL_ADDR_END_HAM_VAM_127
}
 Column end address for RAM scanning of the SSD1309. Only relevant for HAM and VAM. More...
enum  SSD1309_PAGE_ADDR_START_HAM_VAM_te {
  SSD1309_PAGE_ADDR_START_HAM_VAM_0 , SSD1309_PAGE_ADDR_START_HAM_VAM_1 , SSD1309_PAGE_ADDR_START_HAM_VAM_2 , SSD1309_PAGE_ADDR_START_HAM_VAM_3 ,
  SSD1309_PAGE_ADDR_START_HAM_VAM_4 , SSD1309_PAGE_ADDR_START_HAM_VAM_5 , SSD1309_PAGE_ADDR_START_HAM_VAM_6 , SSD1309_PAGE_ADDR_START_HAM_VAM_7
}
 Page address start for RAM scanning of the SSD1309. Only relevant for HAM and VAM. More...
enum  SSD1309_PAGE_ADDR_END_HAM_VAM_te {
  SSD1309_PAGE_ADDR_END_HAM_VAM_0 , SSD1309_PAGE_ADDR_END_HAM_VAM_1 , SSD1309_PAGE_ADDR_END_HAM_VAM_2 , SSD1309_PAGE_ADDR_END_HAM_VAM_3 ,
  SSD1309_PAGE_ADDR_END_HAM_VAM_4 , SSD1309_PAGE_ADDR_END_HAM_VAM_5 , SSD1309_PAGE_ADDR_END_HAM_VAM_6 , SSD1309_PAGE_ADDR_END_HAM_VAM_7
}
 Page address end for RAM scanning of the SSD1309. Only relevant for HAM and VAM. More...
enum  SSD1309_START_LINE_te {
  SSD1309_START_LINE_0 , SSD1309_START_LINE_1 , SSD1309_START_LINE_2 , SSD1309_START_LINE_3 ,
  SSD1309_START_LINE_4 , SSD1309_START_LINE_5 , SSD1309_START_LINE_6 , SSD1309_START_LINE_7 ,
  SSD1309_START_LINE_8 , SSD1309_START_LINE_9 , SSD1309_START_LINE_10 , SSD1309_START_LINE_11 ,
  SSD1309_START_LINE_12 , SSD1309_START_LINE_13 , SSD1309_START_LINE_14 , SSD1309_START_LINE_15 ,
  SSD1309_START_LINE_16 , SSD1309_START_LINE_17 , SSD1309_START_LINE_18 , SSD1309_START_LINE_19 ,
  SSD1309_START_LINE_20 , SSD1309_START_LINE_21 , SSD1309_START_LINE_22 , SSD1309_START_LINE_23 ,
  SSD1309_START_LINE_24 , SSD1309_START_LINE_25 , SSD1309_START_LINE_26 , SSD1309_START_LINE_27 ,
  SSD1309_START_LINE_28 , SSD1309_START_LINE_29 , SSD1309_START_LINE_30 , SSD1309_START_LINE_31 ,
  SSD1309_START_LINE_32 , SSD1309_START_LINE_33 , SSD1309_START_LINE_34 , SSD1309_START_LINE_35 ,
  SSD1309_START_LINE_36 , SSD1309_START_LINE_37 , SSD1309_START_LINE_38 , SSD1309_START_LINE_39 ,
  SSD1309_START_LINE_40 , SSD1309_START_LINE_41 , SSD1309_START_LINE_42 , SSD1309_START_LINE_43 ,
  SSD1309_START_LINE_44 , SSD1309_START_LINE_45 , SSD1309_START_LINE_46 , SSD1309_START_LINE_47 ,
  SSD1309_START_LINE_48 , SSD1309_START_LINE_49 , SSD1309_START_LINE_50 , SSD1309_START_LINE_51 ,
  SSD1309_START_LINE_52 , SSD1309_START_LINE_53 , SSD1309_START_LINE_54 , SSD1309_START_LINE_55 ,
  SSD1309_START_LINE_56 , SSD1309_START_LINE_57 , SSD1309_START_LINE_58 , SSD1309_START_LINE_59 ,
  SSD1309_START_LINE_60 , SSD1309_START_LINE_61 , SSD1309_START_LINE_62 , SSD1309_START_LINE_63
}
 Which row in RAM to appear at the top of the screen. More...
enum  SSD1309_CONTRAST_te {
  SSD1309_CONTRAST_0 , SSD1309_CONTRAST_1 , SSD1309_CONTRAST_2 , SSD1309_CONTRAST_3 ,
  SSD1309_CONTRAST_4 , SSD1309_CONTRAST_5 , SSD1309_CONTRAST_6 , SSD1309_CONTRAST_7 ,
  SSD1309_CONTRAST_8 , SSD1309_CONTRAST_9 , SSD1309_CONTRAST_10 , SSD1309_CONTRAST_11 ,
  SSD1309_CONTRAST_12 , SSD1309_CONTRAST_13 , SSD1309_CONTRAST_14 , SSD1309_CONTRAST_15 ,
  SSD1309_CONTRAST_16 , SSD1309_CONTRAST_17 , SSD1309_CONTRAST_18 , SSD1309_CONTRAST_19 ,
  SSD1309_CONTRAST_20 , SSD1309_CONTRAST_21 , SSD1309_CONTRAST_22 , SSD1309_CONTRAST_23 ,
  SSD1309_CONTRAST_24 , SSD1309_CONTRAST_25 , SSD1309_CONTRAST_26 , SSD1309_CONTRAST_27 ,
  SSD1309_CONTRAST_28 , SSD1309_CONTRAST_29 , SSD1309_CONTRAST_30 , SSD1309_CONTRAST_31 ,
  SSD1309_CONTRAST_32 , SSD1309_CONTRAST_33 , SSD1309_CONTRAST_34 , SSD1309_CONTRAST_35 ,
  SSD1309_CONTRAST_36 , SSD1309_CONTRAST_37 , SSD1309_CONTRAST_38 , SSD1309_CONTRAST_39 ,
  SSD1309_CONTRAST_40 , SSD1309_CONTRAST_41 , SSD1309_CONTRAST_42 , SSD1309_CONTRAST_43 ,
  SSD1309_CONTRAST_44 , SSD1309_CONTRAST_45 , SSD1309_CONTRAST_46 , SSD1309_CONTRAST_47 ,
  SSD1309_CONTRAST_48 , SSD1309_CONTRAST_49 , SSD1309_CONTRAST_50 , SSD1309_CONTRAST_51 ,
  SSD1309_CONTRAST_52 , SSD1309_CONTRAST_53 , SSD1309_CONTRAST_54 , SSD1309_CONTRAST_55 ,
  SSD1309_CONTRAST_56 , SSD1309_CONTRAST_57 , SSD1309_CONTRAST_58 , SSD1309_CONTRAST_59 ,
  SSD1309_CONTRAST_60 , SSD1309_CONTRAST_61 , SSD1309_CONTRAST_62 , SSD1309_CONTRAST_63 ,
  SSD1309_CONTRAST_64 , SSD1309_CONTRAST_65 , SSD1309_CONTRAST_66 , SSD1309_CONTRAST_67 ,
  SSD1309_CONTRAST_68 , SSD1309_CONTRAST_69 , SSD1309_CONTRAST_70 , SSD1309_CONTRAST_71 ,
  SSD1309_CONTRAST_72 , SSD1309_CONTRAST_73 , SSD1309_CONTRAST_74 , SSD1309_CONTRAST_75 ,
  SSD1309_CONTRAST_76 , SSD1309_CONTRAST_77 , SSD1309_CONTRAST_78 , SSD1309_CONTRAST_79 ,
  SSD1309_CONTRAST_80 , SSD1309_CONTRAST_81 , SSD1309_CONTRAST_82 , SSD1309_CONTRAST_83 ,
  SSD1309_CONTRAST_84 , SSD1309_CONTRAST_85 , SSD1309_CONTRAST_86 , SSD1309_CONTRAST_87 ,
  SSD1309_CONTRAST_88 , SSD1309_CONTRAST_89 , SSD1309_CONTRAST_90 , SSD1309_CONTRAST_91 ,
  SSD1309_CONTRAST_92 , SSD1309_CONTRAST_93 , SSD1309_CONTRAST_94 , SSD1309_CONTRAST_95 ,
  SSD1309_CONTRAST_96 , SSD1309_CONTRAST_97 , SSD1309_CONTRAST_98 , SSD1309_CONTRAST_99 ,
  SSD1309_CONTRAST_100 , SSD1309_CONTRAST_101 , SSD1309_CONTRAST_102 , SSD1309_CONTRAST_103 ,
  SSD1309_CONTRAST_104 , SSD1309_CONTRAST_105 , SSD1309_CONTRAST_106 , SSD1309_CONTRAST_107 ,
  SSD1309_CONTRAST_108 , SSD1309_CONTRAST_109 , SSD1309_CONTRAST_110 , SSD1309_CONTRAST_111 ,
  SSD1309_CONTRAST_112 , SSD1309_CONTRAST_113 , SSD1309_CONTRAST_114 , SSD1309_CONTRAST_115 ,
  SSD1309_CONTRAST_116 , SSD1309_CONTRAST_117 , SSD1309_CONTRAST_118 , SSD1309_CONTRAST_119 ,
  SSD1309_CONTRAST_120 , SSD1309_CONTRAST_121 , SSD1309_CONTRAST_122 , SSD1309_CONTRAST_123 ,
  SSD1309_CONTRAST_124 , SSD1309_CONTRAST_125 , SSD1309_CONTRAST_126 , SSD1309_CONTRAST_127 ,
  SSD1309_CONTRAST_128 , SSD1309_CONTRAST_129 , SSD1309_CONTRAST_130 , SSD1309_CONTRAST_131 ,
  SSD1309_CONTRAST_132 , SSD1309_CONTRAST_133 , SSD1309_CONTRAST_134 , SSD1309_CONTRAST_135 ,
  SSD1309_CONTRAST_136 , SSD1309_CONTRAST_137 , SSD1309_CONTRAST_138 , SSD1309_CONTRAST_139 ,
  SSD1309_CONTRAST_140 , SSD1309_CONTRAST_141 , SSD1309_CONTRAST_142 , SSD1309_CONTRAST_143 ,
  SSD1309_CONTRAST_144 , SSD1309_CONTRAST_145 , SSD1309_CONTRAST_146 , SSD1309_CONTRAST_147 ,
  SSD1309_CONTRAST_148 , SSD1309_CONTRAST_149 , SSD1309_CONTRAST_150 , SSD1309_CONTRAST_151 ,
  SSD1309_CONTRAST_152 , SSD1309_CONTRAST_153 , SSD1309_CONTRAST_154 , SSD1309_CONTRAST_155 ,
  SSD1309_CONTRAST_156 , SSD1309_CONTRAST_157 , SSD1309_CONTRAST_158 , SSD1309_CONTRAST_159 ,
  SSD1309_CONTRAST_160 , SSD1309_CONTRAST_161 , SSD1309_CONTRAST_162 , SSD1309_CONTRAST_163 ,
  SSD1309_CONTRAST_164 , SSD1309_CONTRAST_165 , SSD1309_CONTRAST_166 , SSD1309_CONTRAST_167 ,
  SSD1309_CONTRAST_168 , SSD1309_CONTRAST_169 , SSD1309_CONTRAST_170 , SSD1309_CONTRAST_171 ,
  SSD1309_CONTRAST_172 , SSD1309_CONTRAST_173 , SSD1309_CONTRAST_174 , SSD1309_CONTRAST_175 ,
  SSD1309_CONTRAST_176 , SSD1309_CONTRAST_177 , SSD1309_CONTRAST_178 , SSD1309_CONTRAST_179 ,
  SSD1309_CONTRAST_180 , SSD1309_CONTRAST_181 , SSD1309_CONTRAST_182 , SSD1309_CONTRAST_183 ,
  SSD1309_CONTRAST_184 , SSD1309_CONTRAST_185 , SSD1309_CONTRAST_186 , SSD1309_CONTRAST_187 ,
  SSD1309_CONTRAST_188 , SSD1309_CONTRAST_189 , SSD1309_CONTRAST_190 , SSD1309_CONTRAST_191 ,
  SSD1309_CONTRAST_192 , SSD1309_CONTRAST_193 , SSD1309_CONTRAST_194 , SSD1309_CONTRAST_195 ,
  SSD1309_CONTRAST_196 , SSD1309_CONTRAST_197 , SSD1309_CONTRAST_198 , SSD1309_CONTRAST_199 ,
  SSD1309_CONTRAST_200 , SSD1309_CONTRAST_201 , SSD1309_CONTRAST_202 , SSD1309_CONTRAST_203 ,
  SSD1309_CONTRAST_204 , SSD1309_CONTRAST_205 , SSD1309_CONTRAST_206 , SSD1309_CONTRAST_207 ,
  SSD1309_CONTRAST_208 , SSD1309_CONTRAST_209 , SSD1309_CONTRAST_210 , SSD1309_CONTRAST_211 ,
  SSD1309_CONTRAST_212 , SSD1309_CONTRAST_213 , SSD1309_CONTRAST_214 , SSD1309_CONTRAST_215 ,
  SSD1309_CONTRAST_216 , SSD1309_CONTRAST_217 , SSD1309_CONTRAST_218 , SSD1309_CONTRAST_219 ,
  SSD1309_CONTRAST_220 , SSD1309_CONTRAST_221 , SSD1309_CONTRAST_222 , SSD1309_CONTRAST_223 ,
  SSD1309_CONTRAST_224 , SSD1309_CONTRAST_225 , SSD1309_CONTRAST_226 , SSD1309_CONTRAST_227 ,
  SSD1309_CONTRAST_228 , SSD1309_CONTRAST_229 , SSD1309_CONTRAST_230 , SSD1309_CONTRAST_231 ,
  SSD1309_CONTRAST_232 , SSD1309_CONTRAST_233 , SSD1309_CONTRAST_234 , SSD1309_CONTRAST_235 ,
  SSD1309_CONTRAST_236 , SSD1309_CONTRAST_237 , SSD1309_CONTRAST_238 , SSD1309_CONTRAST_239 ,
  SSD1309_CONTRAST_240 , SSD1309_CONTRAST_241 , SSD1309_CONTRAST_242 , SSD1309_CONTRAST_243 ,
  SSD1309_CONTRAST_244 , SSD1309_CONTRAST_245 , SSD1309_CONTRAST_246 , SSD1309_CONTRAST_247 ,
  SSD1309_CONTRAST_248 , SSD1309_CONTRAST_249 , SSD1309_CONTRAST_250 , SSD1309_CONTRAST_251 ,
  SSD1309_CONTRAST_252 , SSD1309_CONTRAST_253 , SSD1309_CONTRAST_254 , SSD1309_CONTRAST_255
}
 Current control (brightness) of the LEDs in the SSD1309. More...
enum  SSD1309_HORIZONTAL_FLIP_te { SSD1309_HORIZONTAL_FLIP_FALSE , SSD1309_HORIZONTAL_FLIP_TRUE }
 Flip the image horizontally. More...
enum  SSD1309_INVERSE_MODE_te { SSD1309_INVERSE_MODE_FALSE , SSD1309_INVERSE_MODE_TRUE }
 Causes the values stored in RAM to have the opposite effect. (1 to turn off pixel, 0 to turn on pixel) More...
enum  SSD1309_MULTIPLEX_RATIO_te {
  SSD1309_MULTIPLEX_RATIO_16 = 15 , SSD1309_MULTIPLEX_RATIO_17 , SSD1309_MULTIPLEX_RATIO_18 , SSD1309_MULTIPLEX_RATIO_19 ,
  SSD1309_MULTIPLEX_RATIO_20 , SSD1309_MULTIPLEX_RATIO_21 , SSD1309_MULTIPLEX_RATIO_22 , SSD1309_MULTIPLEX_RATIO_23 ,
  SSD1309_MULTIPLEX_RATIO_24 , SSD1309_MULTIPLEX_RATIO_25 , SSD1309_MULTIPLEX_RATIO_26 , SSD1309_MULTIPLEX_RATIO_27 ,
  SSD1309_MULTIPLEX_RATIO_28 , SSD1309_MULTIPLEX_RATIO_29 , SSD1309_MULTIPLEX_RATIO_30 , SSD1309_MULTIPLEX_RATIO_31 ,
  SSD1309_MULTIPLEX_RATIO_32 , SSD1309_MULTIPLEX_RATIO_33 , SSD1309_MULTIPLEX_RATIO_34 , SSD1309_MULTIPLEX_RATIO_35 ,
  SSD1309_MULTIPLEX_RATIO_36 , SSD1309_MULTIPLEX_RATIO_37 , SSD1309_MULTIPLEX_RATIO_38 , SSD1309_MULTIPLEX_RATIO_39 ,
  SSD1309_MULTIPLEX_RATIO_40 , SSD1309_MULTIPLEX_RATIO_41 , SSD1309_MULTIPLEX_RATIO_42 , SSD1309_MULTIPLEX_RATIO_43 ,
  SSD1309_MULTIPLEX_RATIO_44 , SSD1309_MULTIPLEX_RATIO_45 , SSD1309_MULTIPLEX_RATIO_46 , SSD1309_MULTIPLEX_RATIO_47 ,
  SSD1309_MULTIPLEX_RATIO_48 , SSD1309_MULTIPLEX_RATIO_49 , SSD1309_MULTIPLEX_RATIO_50 , SSD1309_MULTIPLEX_RATIO_51 ,
  SSD1309_MULTIPLEX_RATIO_52 , SSD1309_MULTIPLEX_RATIO_53 , SSD1309_MULTIPLEX_RATIO_54 , SSD1309_MULTIPLEX_RATIO_55 ,
  SSD1309_MULTIPLEX_RATIO_56 , SSD1309_MULTIPLEX_RATIO_57 , SSD1309_MULTIPLEX_RATIO_58 , SSD1309_MULTIPLEX_RATIO_59 ,
  SSD1309_MULTIPLEX_RATIO_60 , SSD1309_MULTIPLEX_RATIO_61 , SSD1309_MULTIPLEX_RATIO_62 , SSD1309_MULTIPLEX_RATIO_63 ,
  SSD1309_MULTIPLEX_RATIO_64
}
 Number of SSD1309 LED lines activated. More...
enum  SSD1309_PAGE_START_ADDR_PAM_te {
  SSD1309_PAGE_START_ADDR_PAM_0 , SSD1309_PAGE_START_ADDR_PAM_1 , SSD1309_PAGE_START_ADDR_PAM_2 , SSD1309_PAGE_START_ADDR_PAM_3 ,
  SSD1309_PAGE_START_ADDR_PAM_4 , SSD1309_PAGE_START_ADDR_PAM_5 , SSD1309_PAGE_START_ADDR_PAM_6 , SSD1309_PAGE_START_ADDR_PAM_7
}
 Page address start for RAM scanning of the SSD1309. Only relevant for PAM. More...
enum  SSD1309_VERTICAL_FLIP_te { SSD1309_VERTICAL_FLIP_FALSE , SSD1309_VERTICAL_FLIP_TRUE = 8 }
 Flip the image vertically. More...
enum  SSD1309_OFFSET_te {
  SSD1309_OFFSET_0 = 0 , SSD1309_OFFSET_1 , SSD1309_OFFSET_2 , SSD1309_OFFSET_3 ,
  SSD1309_OFFSET_4 , SSD1309_OFFSET_5 , SSD1309_OFFSET_6 , SSD1309_OFFSET_7 ,
  SSD1309_OFFSET_8 , SSD1309_OFFSET_9 , SSD1309_OFFSET_10 , SSD1309_OFFSET_11 ,
  SSD1309_OFFSET_12 , SSD1309_OFFSET_13 , SSD1309_OFFSET_14 , SSD1309_OFFSET_15 ,
  SSD1309_OFFSET_16 , SSD1309_OFFSET_17 , SSD1309_OFFSET_18 , SSD1309_OFFSET_19 ,
  SSD1309_OFFSET_20 , SSD1309_OFFSET_21 , SSD1309_OFFSET_22 , SSD1309_OFFSET_23 ,
  SSD1309_OFFSET_24 , SSD1309_OFFSET_25 , SSD1309_OFFSET_26 , SSD1309_OFFSET_27 ,
  SSD1309_OFFSET_28 , SSD1309_OFFSET_29 , SSD1309_OFFSET_30 , SSD1309_OFFSET_31 ,
  SSD1309_OFFSET_32 , SSD1309_OFFSET_33 , SSD1309_OFFSET_34 , SSD1309_OFFSET_35 ,
  SSD1309_OFFSET_36 , SSD1309_OFFSET_37 , SSD1309_OFFSET_38 , SSD1309_OFFSET_39 ,
  SSD1309_OFFSET_40 , SSD1309_OFFSET_41 , SSD1309_OFFSET_42 , SSD1309_OFFSET_43 ,
  SSD1309_OFFSET_44 , SSD1309_OFFSET_45 , SSD1309_OFFSET_46 , SSD1309_OFFSET_47 ,
  SSD1309_OFFSET_48 , SSD1309_OFFSET_49 , SSD1309_OFFSET_50 , SSD1309_OFFSET_51 ,
  SSD1309_OFFSET_52 , SSD1309_OFFSET_53 , SSD1309_OFFSET_54 , SSD1309_OFFSET_55 ,
  SSD1309_OFFSET_56 , SSD1309_OFFSET_57 , SSD1309_OFFSET_58 , SSD1309_OFFSET_59 ,
  SSD1309_OFFSET_60 , SSD1309_OFFSET_61 , SSD1309_OFFSET_62 , SSD1309_OFFSET_63
}
 selects which RAM row is internally linked to COM0. More...
enum  SSD1309_CLK_DIV_RATIO_te {
  SSD1309_CLK_DIV_RATIO_1 = 1 , SSD1309_CLK_DIV_RATIO_2 , SSD1309_CLK_DIV_RATIO_3 , SSD1309_CLK_DIV_RATIO_4 ,
  SSD1309_CLK_DIV_RATIO_5 , SSD1309_CLK_DIV_RATIO_6 , SSD1309_CLK_DIV_RATIO_7 , SSD1309_CLK_DIV_RATIO_8 ,
  SSD1309_CLK_DIV_RATIO_9 , SSD1309_CLK_DIV_RATIO_10 , SSD1309_CLK_DIV_RATIO_11 , SSD1309_CLK_DIV_RATIO_12 ,
  SSD1309_CLK_DIV_RATIO_13 , SSD1309_CLK_DIV_RATIO_14 , SSD1309_CLK_DIV_RATIO_15 , SSD1309_CLK_DIV_RATIO_16
}
 The divide ratio of the SSD1309 clock. More...
enum  SSD1309_CLK_SPEED_LVL_te {
  SSD1309_CLK_SPEED_LVL_0 , SSD1309_CLK_SPEED_LVL_LVL_1 , SSD1309_CLK_SPEED_LVL_LVL_2 , SSD1309_CLK_SPEED_LVL_LVL_3 ,
  SSD1309_CLK_SPEED_LVL_LVL_4 , SSD1309_CLK_SPEED_LVL_LVL_5 , SSD1309_CLK_SPEED_LVL_LVL_6 , SSD1309_CLK_SPEED_LVL_LVL_7 ,
  SSD1309_CLK_SPEED_LVL_LVL_8 , SSD1309_CLK_SPEED_LVL_LVL_9 , SSD1309_CLK_SPEED_LVL_LVL_10 , SSD1309_CLK_SPEED_LVL_LVL_11 ,
  SSD1309_CLK_SPEED_LVL_LVL_12 , SSD1309_CLK_SPEED_LVL_LVL_13 , SSD1309_CLK_SPEED_LVL_LVL_14 , SSD1309_CLK_SPEED_LVL_LVL_15
}
 The clock speed of the SSD1309. More...
enum  SSD1309_PHASE1_PRECHARGE_DCLK_te {
  SSD1309_PHASE1_PRECHARGE_DCLK_1 = 1 , SSD1309_PHASE1_PRECHARGE_DCLK_2 , SSD1309_PHASE1_PRECHARGE_DCLK_3 , SSD1309_PHASE1_PRECHARGE_DCLK_4 ,
  SSD1309_PHASE1_PRECHARGE_DCLK_5 , SSD1309_PHASE1_PRECHARGE_DCLK_6 , SSD1309_PHASE1_PRECHARGE_DCLK_7 , SSD1309_PHASE1_PRECHARGE_DCLK_8 ,
  SSD1309_PHASE1_PRECHARGE_DCLK_9 , SSD1309_PHASE1_PRECHARGE_DCLK_10 , SSD1309_PHASE1_PRECHARGE_DCLK_11 , SSD1309_PHASE1_PRECHARGE_DCLK_12 ,
  SSD1309_PHASE1_PRECHARGE_DCLK_13 , SSD1309_PHASE1_PRECHARGE_DCLK_14 , SSD1309_PHASE1_PRECHARGE_DCLK_15
}
 Phase 1 (discharge) length of the segment (pixel) output wave form. More...
enum  SSD1309_PHASE2_PRECHARGE_DCLK_te {
  SSD1309_PHASE2_PRECHARGE_DCLK_1 = 1 , SSD1309_PHASE2_PRECHARGE_DCLK_2 , SSD1309_PHASE2_PRECHARGE_DCLK_3 , SSD1309_PHASE2_PRECHARGE_DCLK_4 ,
  SSD1309_PHASE2_PRECHARGE_DCLK_5 , SSD1309_PHASE2_PRECHARGE_DCLK_6 , SSD1309_PHASE2_PRECHARGE_DCLK_7 , SSD1309_PHASE2_PRECHARGE_DCLK_8 ,
  SSD1309_PHASE2_PRECHARGE_DCLK_9 , SSD1309_PHASE2_PRECHARGE_DCLK_10 , SSD1309_PHASE2_PRECHARGE_DCLK_11 , SSD1309_PHASE2_PRECHARGE_DCLK_12 ,
  SSD1309_PHASE2_PRECHARGE_DCLK_13 , SSD1309_PHASE2_PRECHARGE_DCLK_14 , SSD1309_PHASE2_PRECHARGE_DCLK_15
}
 Phase 2 (charge) length of the segment (pixel) output wave form. More...
enum  SSD1309_VCOMH_DESELECT_LVL_te { SSD1309_VCOMH_DESELECT_LVL_LOW , SSD1309_VCOMH_DESELECT_LVL_MED = 13 , SSD1309_VCOMH_DESELECT_LVL_HIGH = 15 }
 The deselect level of a LED row in the SSD1309. LOW -> 0.64 * Vcc MED -> 0.78 * Vcc HIGH -> 0.84 * Vcc. More...

Functions

ERR_te ssd1309_init_subsys (void)
 Initializes the SSD1309 subsystem.
ERR_te ssd1309_deinit_subsys (void)
 Deinitializes the SSD1309 subsystem.
ERR_te ssd1309_start_subsys (void)
 Starts the SSD1309 subsystem.
ERR_te ssd1309_stop_subsys (void)
 Stops the SSD1309 subsystem.
ERR_te ssd1309_get_def_cfg (SSD1309_CFG_ts *ssd1309_cfg_o)
 Populates a configuration structure with sensible default values.
ERR_te ssd1309_init_handle (SSD1309_CFG_ts *ssd1309_cfg, SSD1309_HANDLE_ts **ssd1309_handle_o)
 Initializes the SSD1309 display and sends the full configuration sequence over I2C.
ERR_te ssd1309_draw_text (char const *text, uint8_t text_len, uint8_t line, bool force)
 Draws a text string into the framebuffer at the specified line.
ERR_te ssd1309_draw_rect (uint8_t x_src, uint8_t y_src, uint8_t x_dest, uint8_t y_dest, bool force)
 Draws a filled rectangle into the framebuffer.
ERR_te ssd1309_clear_line (uint8_t line, bool force)
 Clears a single display line in the framebuffer (sets all pixels off).
ERR_te ssd1309_invert_line (uint8_t line, bool force)
 Inverts all pixels in a single display line in the framebuffer.
ERR_te ssd1309_clear_rect (uint8_t x_src, uint8_t y_src, uint8_t x_dest, uint8_t y_dest, bool force)
 Clears a rectangular region in the framebuffer (sets all pixels off).
ERR_te ssd1309_invert_rect (uint8_t x_src, uint8_t y_src, uint8_t x_dest, uint8_t y_dest, bool force)
 Inverts all pixels in a rectangular region of the framebuffer.
ERR_te ssd1309_update (bool force)
 Flushes the internal framebuffer to the display over I2C.

Detailed Description

SSD1309 OLED display driver public API.

Author
github.com/Baksi675

This module provides an I2C-based driver for the Solomon Systech SSD1309 128×64 OLED display controller. It maintains an internal framebuffer and exposes high-level drawing operations that are flushed to the display on demand via ssd1309_update.

The display is organized as 8 pages of 8 rows each (64 rows total) by 128 columns. All drawing functions operate on the framebuffer in RAM; changes are not visible until ssd1309_update is called.

Coordinates used by drawing functions are 1-based pixel coordinates:

  • X: 1–128 (left to right)
  • Y: 1–64 (top to bottom)
  • Line: 1–8 (one 8-pixel-tall character row per line)

A force parameter on each drawing function bypasses the initialized / started guard, allowing calls from CLI command handlers before the subsystem is fully started.

Typical usage:

Version
0.1
Date
2026-01-31
Copyright
Copyright (c) 2026

Definition in file ssd1309.h.