Memory-mapped base addresses for all STM32F401RE peripherals. More...

Collaboration diagram for Peripheral Base Addresses:

Macros
#define	ADDR_APB1 (0x40000000U)
	APB1 peripheral bus base address (0x40000000).
#define	ADDR_SPI3 (ADDR_APB1 + 0x3C00)
#define	ADDR_SPI2 (ADDR_APB1 + 0x3800)
#define	ADDR_RTC (ADDR_APB1 + 0x2800)
#define	ADDR_PWR (ADDR_APB1 + 0x7000)
#define	ADDR_I2C3 (ADDR_APB1 + 0x5C00)
#define	ADDR_I2C2 (ADDR_APB1 + 0x5800)
#define	ADDR_I2C1 (ADDR_APB1 + 0x5400)
#define	ADDR_USART2 (ADDR_APB1 + 0x4400)
#define	ADDR_APB2 (0x40010000U)
	APB2 peripheral bus base address (0x40010000).
#define	ADDR_EXTI (ADDR_APB2 + 0x3C00)
#define	ADDR_SYSCFG (ADDR_APB2 + 0x3800)
#define	ADDR_SPI4 (ADDR_APB2 + 0x3400)
#define	ADDR_SPI1 (ADDR_APB2 + 0x3000)
#define	ADDR_USART6 (ADDR_APB2 + 0x1400)
#define	ADDR_USART1 (ADDR_APB2 + 0x1000)
#define	ADDR_AHB1 (0x40020000U)
	AHB1 peripheral bus base address (0x40020000).
#define	ADDR_GPIOA (ADDR_AHB1)
#define	ADDR_GPIOB (ADDR_AHB1 + 0x0400)
#define	ADDR_GPIOC (ADDR_AHB1 + 0x0800)
#define	ADDR_GPIOD (ADDR_AHB1 + 0x0C00)
#define	ADDR_GPIOE (ADDR_AHB1 + 0x1000)
#define	ADDR_GPIOH (ADDR_AHB1 + 0x1C00)
#define	ADDR_RCC (ADDR_AHB1 + 0x3800)
#define	ADDR_AHB2 (0x50000000U)
	AHB2 peripheral bus base address (0x50000000).

Detailed Description

Memory-mapped base addresses for all STM32F401RE peripherals.

Macro Definition Documentation

◆ ADDR_APB1

#define ADDR_APB1 (0x40000000U)

APB1 peripheral bus base address (0x40000000).

Definition at line 47 of file stm32f401re.h.

◆ ADDR_SPI3

#define ADDR_SPI3 (ADDR_APB1 + 0x3C00)

SPI3 base address.

Definition at line 48 of file stm32f401re.h.

◆ ADDR_SPI2

#define ADDR_SPI2 (ADDR_APB1 + 0x3800)

SPI2 base address.

Definition at line 49 of file stm32f401re.h.

◆ ADDR_RTC

#define ADDR_RTC (ADDR_APB1 + 0x2800)

RTC base address.

Definition at line 50 of file stm32f401re.h.

◆ ADDR_PWR

#define ADDR_PWR (ADDR_APB1 + 0x7000)

PWR base address.

Definition at line 51 of file stm32f401re.h.

◆ ADDR_I2C3

#define ADDR_I2C3 (ADDR_APB1 + 0x5C00)

I2C3 base address.

Definition at line 52 of file stm32f401re.h.

◆ ADDR_I2C2

#define ADDR_I2C2 (ADDR_APB1 + 0x5800)

I2C2 base address.

Definition at line 53 of file stm32f401re.h.

◆ ADDR_I2C1

#define ADDR_I2C1 (ADDR_APB1 + 0x5400)

I2C1 base address.

Definition at line 54 of file stm32f401re.h.

◆ ADDR_USART2

#define ADDR_USART2 (ADDR_APB1 + 0x4400)

USART2 base address.

Definition at line 55 of file stm32f401re.h.

◆ ADDR_APB2

#define ADDR_APB2 (0x40010000U)

APB2 peripheral bus base address (0x40010000).

Definition at line 58 of file stm32f401re.h.

◆ ADDR_EXTI

#define ADDR_EXTI (ADDR_APB2 + 0x3C00)

EXTI base address.

Definition at line 59 of file stm32f401re.h.

◆ ADDR_SYSCFG

#define ADDR_SYSCFG (ADDR_APB2 + 0x3800)

SYSCFG base address.

Definition at line 60 of file stm32f401re.h.

◆ ADDR_SPI4

#define ADDR_SPI4 (ADDR_APB2 + 0x3400)

SPI4 base address.

Definition at line 61 of file stm32f401re.h.

◆ ADDR_SPI1

#define ADDR_SPI1 (ADDR_APB2 + 0x3000)

SPI1 base address.

Definition at line 62 of file stm32f401re.h.

◆ ADDR_USART6

#define ADDR_USART6 (ADDR_APB2 + 0x1400)

USART6 base address.

Definition at line 63 of file stm32f401re.h.

◆ ADDR_USART1

#define ADDR_USART1 (ADDR_APB2 + 0x1000)

USART1 base address.

Definition at line 64 of file stm32f401re.h.

◆ ADDR_AHB1

#define ADDR_AHB1 (0x40020000U)

AHB1 peripheral bus base address (0x40020000).

Definition at line 67 of file stm32f401re.h.

◆ ADDR_GPIOA

#define ADDR_GPIOA (ADDR_AHB1)

GPIOA base address.

Definition at line 68 of file stm32f401re.h.

◆ ADDR_GPIOB

#define ADDR_GPIOB (ADDR_AHB1 + 0x0400)

GPIOB base address.

Definition at line 69 of file stm32f401re.h.

◆ ADDR_GPIOC

#define ADDR_GPIOC (ADDR_AHB1 + 0x0800)

GPIOC base address.

Definition at line 70 of file stm32f401re.h.

◆ ADDR_GPIOD

#define ADDR_GPIOD (ADDR_AHB1 + 0x0C00)

GPIOD base address.

Definition at line 71 of file stm32f401re.h.

◆ ADDR_GPIOE

#define ADDR_GPIOE (ADDR_AHB1 + 0x1000)

GPIOE base address.

Definition at line 72 of file stm32f401re.h.

◆ ADDR_GPIOH

#define ADDR_GPIOH (ADDR_AHB1 + 0x1C00)

GPIOH base address.

Definition at line 73 of file stm32f401re.h.

◆ ADDR_RCC

#define ADDR_RCC (ADDR_AHB1 + 0x3800)

RCC base address.

Definition at line 74 of file stm32f401re.h.

◆ ADDR_AHB2

#define ADDR_AHB2 (0x50000000U)

AHB2 peripheral bus base address (0x50000000).

Definition at line 77 of file stm32f401re.h.

Macros